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Intel Releases New Stratix 10 GX 10M FPGAs with Maximum Capacity Worldwide

The Intel Stratix 10 GX 10M FPGA has 10.2 million logic cells and is about 3.7 times denser than the Stratix 10 GX 1SG280 FPGA, which is the most densely packed device in the original Intel Stratix 10 family.

Intel’s EMIB technology is just one of many IC process technology, manufacturing and packaging innovations that enable Intel to design, manufacture and deliver the world’s highest density (representing computing power) FPGAs.

The ASIC prototyping and simulation market is particularly eager for the current maximum capacity FPGA requirements. Several vendors offer commercial off-the-shelf (COTS) ASIC prototyping and simulation systems, and for these vendors, the ability to use today’s largest FPGAs in ASIC simulation and prototyping systems means a huge competitive advantage.

In addition, many large semiconductor companies, including Intel, have developed custom prototyping and simulation systems and used the system to validate their largest, most complex, and most risky ASSP and SoC designs before streaming. ASIC simulation and prototyping systems can help design teams significantly reduce design risk. As a result, Intel FPGAs, including Intel Stratix 10 FPGAs and earlier Stratix III, Stratix IV, and Stratix V devices, have been used as the foundation for many simulation and prototyping systems for more than a decade.

The ASIC simulation and prototyping system supports many of the work related to IC and system development, including:

  • Algorithm development using real hardware
  • Early SoC software development before chip manufacturing
  • RTOS verification
  • Extreme condition testing for hardware and software
  • Continuous design iterative regression test

Simulation and prototyping systems are designed to help semiconductor manufacturers discover and avoid costly hardware and software design flaws before chip manufacturing, saving millions of dollars. The cost of repairing hardware design defects after the chip is manufactured is much higher and often requires expensive redesign costs. When equipment is manufactured and delivered to end customers, the cost of solving these problems can be even higher. Because of the high level of risk and the potential cost savings, these prototyping and simulation systems bring tangible value to the IC design team. The use of simulation and prototyping systems has become more common, because no design team leader dares to ignore this cautious, verifiable investment when economic risk is so high.

With the largest FPGAs, you can incorporate large ASIC, ASSP, and SoC designs into as few FPGA devices as possible. Intel Stratix 10 GX 10M FPGAs are the latest in a range of large FPGA families for this type of application. The new Intel Stratix 10 FPGA supports the development of simulation and prototyping systems for digital IC designs that consume billions of ASIC gates. The Intel Stratix 10 GX 10M FPGA with 10.2 million logic cells now supports the Intel Quartus Prime software suite. The kit features a new dedicated IP that clearly supports ASIC emulation and prototyping.

The Intel Stratix 10 GX 10M FPGA is the first Intel FPGA to use EMIB technology and logically and electrically combine two FPGA fabrics to achieve up to 10.2 million logic cell densities. On this device, tens of thousands of connections connect two FPGA fabrics through multiple EMIBs, creating a high-bandwidth connection between two monolithic FPGA fabrics.

Previously, Intel used EMIB technology to connect I/O and memory cells to FPGA fabrics, enabling the scale and variety of the Intel Stratix 10 FPGA family to expand. For example, an Intel Stratix 10 MX device integrates an 8 GB or 16 GB EMIB connected 3D stacked HBM2 SRAM unit. The recently released Intel Stratix 10 DX FPGA integrates EMIB-connected P tiles with PCIe 4.0 compatibility. (See “Intel Stratix 10 DX FPGAs are the first (and only) FPGAs in the list of PCIe-compliant PCI-SIG system-integrated devices.”)

The P tile used in Intel Stratix 10 DX FPGAs is the first component-level device in the list of PCIe SIG-compliant PCI-SIG system-integrated devices. The same release of the same P tile is also tightly integrated in the recently released Intel Agilex FPGA, which is also compatible with PCIe 4.0 devices. (See “Whether you currently need PCIe Gen 4 x16 version 1.0 functionality and fully compliant with the PCI-SIG specification for FPGA Intel Agilex FPGAs.” The P tile used in Intel Stratix 10 DX and Intel Agilex FPGAs is Another great example of this application, it demonstrates advanced manufacturing and manufacturing technologies such as EMIB, and how to get Intel to bring a range of new products to market quickly and into full production.

Perhaps more importantly, the semiconductor and packaging technology used to make Intel Stratix 10 GX 10M FPGAs is not just for manufacturing the world’s largest FPGAs. It’s just a value added, and although it’s important, it’s not the most important.

And the focus is on:

These technologies enable Intel to integrate virtually any type of device into a packaged system by integrating different semiconductor wafers, including FPGAs, ASICs, eASIC structured ASICs, I/O cells, 3D stacked memory cells, and photonic devices. ) to meet specific customer needs. These advanced technologies combine to form Intel’s unique, innovative and strategic advantages.

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